In this section, Egan first introduces the reader to the fundamentals of PLL theory before discussing the effect that a feedback divider can have on PLL performance. Subsequently, he provides a standard analysis of the phase-lock state that will be used throughout the course of this work. Egan then later develops the analysis for low SNR scenarios, followed by a discussion of two different estimation procedures that can be used to measure PLL performance under these types of situations. The topics treated include educational concepts as well as most of the equations used in this work. Last, the author concludes by briefly discussing several additional topics that are useful to understand for the information presented in this work
i.e., condensers and diodes in an ENA configuration. This example is quite useful when the feedback divider stage is implemented as a voltage-controlled oscillator (VCO) where the multiplier and followers operate as a divider. As illustrated in the figure, a simple unity-gain feedback divider can be implemented using a single transistor to transconduct the feedback signal and the PLL output. In this example, the output drive of the voltage-controlled oscillator is reduced in proportion to the feedback signal so that the load impedance, which is represented by a series resistance, is decreased. In addition, divider spikes can be removed if the transistor is in the unity-gain region.
The second phase lock condition arises when the feedback signal is proportional to the phase of the synthesizer output. In this case, phase detection can be used to extract the phase, which enables the feedback signal to be used directly to control the frequency of the synthesizer.
This effect is used to adjust the DC stability of the loop, , is found by operating the loop in quadrature. To achieve this state, the output of the loop is passed through a 180° phase buffer which is typically a CMOS inverter. The state of the inverter output is also used to detect the phase of the synthesizer; one output of the buffer is normally grounded. d2c66b5586